? semiconductor components industries, llc, 2014 june, 2014 ? rev. 5 1 publication order number: ncs1002a/d ncs1002a constant voltage / constant current secondary-side controller description the ncs1002a is a performance upgrade from the ncs1002 focused on reducing power consumption in applications that require more efficient operation. it is a highly integrated solution for switching mode power supply (smps) applications requiring a dual control loop to perform constant voltage (cv) and constant current (cc) regulation. the ncs1002a integrates a 2.5 v voltage reference and two precision op amps. the voltage reference, along with op amp 1, is the core of the voltage control-loop. op amp 2 is an independent, uncommitted amplifier specifically designed for the current control. key external components needed to complete the two control loops are: (a) a resistor divider that senses the output of the power supply (battery charger) and fixes the voltage regulation set point at the specified value. (b) a sense resistor that feeds the current sensing circuit with a voltage proportional to the dc output current. this resistor determines the current regulation set point and must be adequately rated in terms of power dissipation. the ncs1002a comes in a small 8?pin soic package and is ideal for space-shrunk applications such as battery chargers. features ? low input offset voltage: 0.5 mv, typ ? input common-mode range includes ground ? low quiescent current: 75 a per op amp at v cc = 5 v ? large output voltage swing ? wide power supply range: 3 v to 36 v ? high esd protection: 2 kv ? this is a pb?free device typical applications ? battery chargers ? switch mode power supplies marking diagrams http://onsemi.com (note: microdot may be in either location) see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information soic?8 d suffix case 751 1002a alyw 1 8 a = assembly location l = wafer lot y = year w = work week = pb?free package 1 8 1 8 2 3 4 7 6 5 (top view) out 1 in 1? in 1+ gnd v cc out 2 in 2? in 2+ pin connections 1 8 2 3 4 7 6 5 2.5v output 1 inputs 1 gnd v cc output 2 inputs 2 + - - +
ncs1002a http://onsemi.com 2 maximum ratings parameter symbol rating unit supply voltage (v cc to gnd) (operating range v cc = 3 v to 36 v) v cc 36 v differential input voltage v id 36 v input voltage v i ?0.3 to +36 v esd protection voltage at pin human body model v esd 2000 v maximum junction temperature t j 150 c specification temperature range (t min to t max ) t a ?40 to +105 c operating free?air temperature range t oper ?55 to +125 c storage temperature range t stg ?55 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. thermal characteristics parameter symbol rating unit thermal resistance junction?to?ambient r ja 175 c/w
ncs1002a http://onsemi.com 3 electrical characteristics symbol characteristics conditions min typ max unit i cc total supply current, excluding current in the voltage reference v cc = 5 v, no load; ?40 t a +105 c 0.15 0.25 ma i cc total supply current, excluding current in the voltage reference v cc = 30 v, no load; ?40 t a +105 c 0.2 0.3 ma op amp 1 (op amp with noninverting input connected to the internal v ref ) (v cc = 5 v, t a = 25 c unless otherwise noted) v io input offset voltage t a = 25 c 2.0 mv ?40 t a +105 c 3.0 mv dv io input offset voltage drift (?40 t a +105 c) 7.0 v/ c l ib input bias current (inverting input only) 20 150 na avd large signal voltage gain (v cc = 15 v, r l = 2 k , v icm = 0 v) 100 v/mv psrr power supply rejection (v cc = 5.0 v to 30 v, v out = 2 v) 80 100 db i source output source current (v cc = 15 v, v out = 2.0 v, v id = 1 v) 20 40 ma i o short circuit to gnd (v cc = 15 v) 40 60 ma i sink output current sink (v id = ?1 v) v cc = +15 v, v out = 0.2 v (note 1) 1 10 ma v cc = +15 v, v out = 2 v 10 20 ma v oh output voltage swing, high (v cc = 30 v) r l = 2 k , t a = 25 c 26 27 v ?40 t a +105 c 26 r l = 10 k , t a = 25 c 27 28 ?40 t a +105 c 27 v ol output voltage swing, low r l = 10 k , t a = 25 c 5.0 50 mv sr slew rate (av = +1, v i = 0.5 v to 2 v, v cc = 15 v, r l = 2 k , c l = 100 pf) 0.2 0.4 v/ s gbp gain bandwidth product (v cc = 30 v, av = +1, (note 1) r l = 2 k , c l = 100 pf, f = 100 khz, v in = 10 mv pp ) 0.5 0.9 mhz thd total harmonic distortion (f = 1 khz, av = 10, r l = 2 k , v cc = 30 v, v out = 2 v pp ) 0.08 % op amp 2 (independent op amp) (v cc = 5.0 v, t a = 25 c unless otherwise noted) v io input offset voltage t a = 25 c 0.5 2.0 mv ?40 t a +105 c 3.0 dv io input offset voltage drift (?40 t a +105 c) 7.0 v/ c i io input offset current t a = 25 c 2.0 75 na ?40 t a +105 c 150 i b input bias current t a = 25 c 20 150 na ?40 t a +105 c 200 avd large signal voltage gain (v cc = 15 v, r l = 2 k , v out = 1.4 v to 11.4 v) t a = 25 c 50 100 v/mv ?40 t a +105 c 25 psrr power supply rejection (v cc = 5 v to 30 v) 80 100 db 1. guaranteed by design and/or characterization.
ncs1002a http://onsemi.com 4 electrical characteristics (continued) symbol unit max typ min conditions characteristics op amp 2 (independent op amp) (continued) (v cc = 5.0 v, t a = 25 c unless otherwise noted) v icm input common mode voltage range (note 2) (v cc = +30 v) t a = 25 c 0 v cc ? 1.5 v ?40 t a +105 c 0 v cc ? 2.0 cmrr common mode rejection ratio (note 4) 0 to v cc ? 1.7 v, t a = 25 c 70 85 db 0 to v cc ? 2.2 v ?40 t a +105 c 60 i source output current source (v cc = 15 v, v out = 2 v, v id = +1 v) 20 40 ma i o short?circuit to gnd (v cc = 15 v) 40 60 ma i sink output current sink (v id = ?1 v) v cc = +15 v, v out = 0.2 v 1 10 ma v cc = +15 v, v out = 2 v 10 20 ma v oh output voltage swing, high (v cc = 30 v) r l = 2 k , t a = 25 c 26 27 v ?40 t a +105 c 26 r l = 10 k , t a = 25 c 27 28 ?40 t a +105 c 27 v ol output voltage swing, low r l = 10 k , t a = 25 c 5.0 50 mv sr slew rate (av = +1, v i = 0.5 v to 3 v, v cc = 15 v, r l = 2 k , c l = 100 pf) 0.2 0.4 v/ s gbp gain bandwidth product (v cc = 30 v, av = +1, r l = 2 k , c l = 100 pf, f = 100 khz, v in = 10 mv pp ) (note 4) 0.5 0.9 mhz thd total harmonic distortion (f = 1 khz, av = 10, r l = 2 k , v cc = 30 v, v out = 2 v pp ) 0.08 % e noise equivalent input noise voltage (f = 1 khz, r s = 100 , v cc = 30 v) 50 nv/ hz voltage reference (v cc = 5.0 v, t a = 25 c unless otherwise noted) i k cathode current 0.05 100 ma v ref reference voltage (i k = 1 ma) t a = 25 c 2.49 2.5 2.51 v ?40 t a +105 c 2.48 2.5 2.52 v ref reference deviation over temperature (v ka = v ref , i k = 10 ma, ?40 t a +105 c) (note 4) 7.0 30 mv i min minimum cathode current for regulation (2.4875 v f v ka 2.5125 v f ) 10 50 a i zka i dynamic impedance (note 3) (v ka = v ref , i k = 1 ma to 100 ma, f < 1 khz) 0.2 0.5 2. the input common?mode voltage of either input signal should not be allowed to go negative by more than 0.3 v. the upper end o f the common?mode range is v cc ? 1.5 v. both inputs can go to v cc + 0.3 v without damage. 3. the dynamic impedance is defined as l zka l = v ka / i k . 4. guaranteed by design and/or characterization.
ncs1002a http://onsemi.com 5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ?50 ?30 ?10 10 30 50 70 90 110 130 input offset voltage (mv) op1 temperature ( c) figure 1. input offset voltage vs. temperature 0 1 2 3 4 5 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) bias current (na) figure 2. ib vs. temperature 2.4 2.42 2.44 2.46 2.48 2.5 2.52 2.54 2.56 2.58 2.6 010 2030405060708090100 cathode current ik (ma) figure 3. vref as a function of ik vref (v) 2.48 2.49 2.5 2.51 2.52 ?40 ?20 0 20 40 60 80 100 temperature ( c) figure 4. vref over temperature vref (v) 0.2 0.25 0.3 0.35 0.4 0.45 0.5 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 temperature ( c) figure 5. ref dynamic impedance vs. temperature dynamic impedance ( )
ncs1002a http://onsemi.com 6 0 20 40 60 80 100 120 0 5 10 15 20 25 30 35 psrr (db) supply voltage (v) figure 6. ncs1002a psrr vs. supply voltage 25 c 105 c ?40 c 0 20 40 60 80 100 120 0 5 10 15 20 25 30 35 ?40 c 105 c 25 c common mode rejection ratio (db) supply voltage (v) figure 7. ncs1002a cmrr vs. supply voltage 10 1 0.1 0.01 0.001 100 1k 10k distortion (%) frequency (hz) figure 8. distortion vs. frequency thd+n thd v s = +/? 15 v r l = 2k to v ee a v = 10 v o = 2 v pp 25 c output voltage (v) output current (ma) figure 9. output voltage swing vs. output current v id = 1 v, v cm = 0 v, v cc = 3 v to 36 v 0 5 10 15 20 25 30 35 40 45 v cc v cc ? 0.5 v cc ? 1 v cc ? 1.5 v cc ? 2 v cc ? 2.5 gnd + 2 gnd + 1.5 gnd + 1 gnd + 0.5 gnd v ol t a = 25 c v ol t a = 105 c v oh t a = 25 c v oh t a = 105 c uuuuuussss uuuuuu ssss uuuuusssss uuuuusssss uuuuu sssss suuuusssss ssuuusssss ssuuusssss sssuusssss ssssssssss ssssssssss sssssuusss sssuuuuuus ssuuuuuuu s suuuuuuuus uuuuuuuuus 100 50 40 30 20 15 10 7.5 5 2.5 1 0.5 0.25 0.1 0.05 0 1000 300 200 100 47 4.7 1 0.47 0.1 ik (ma) capacitive load on vref pin 3 (nf) figure 10. region of reference stability vs. capacitive load (pin 3) s ? stable; u ? unstable
ncs1002a http://onsemi.com 7 ncp1200 figure 1. ac adapter application 1 2 3 4 8 7 6 5 ? + 90?264 vac v4 ncp1200d60 1 2 3 4 8 7 6 5 ncs1002a out1 in1? in1+ ground v cc out2 in2? in2+ r9 470 r8 2.7 k 1% r6 0.15 c8 0.1 c4 47 r3 10 k 1% r5 10 k 1% r2 3.3 k l3 4.7 h 1 a r4 1.5 k r11 75 k 1% c3 330 f c2 10 d1 mur120 d2 1n5819 c6 4.7 400 v d6 1n4148 r13 220 k c7 47 f r7 3.3 0.6 w mtd1n60e q1 c10 1 nf 250 vac y1 c1 r1 d3 1n4937 l1 470 h 0.2 a c5 4.7 400 v l2 470 h 0.2 a r12 10 k 1 2 3 4 u2 df06s + ++ + + + c9 0.047 f r10 68 k 1 2 3 4 d4 1n4148 d5 1n4148 u3 5.2 v, 600 ma 470p 250 v 100 k 1 w u1 sfh6156?3 u4
ncs1002a http://onsemi.com 8 ordering information device package shipping ? NCS1002ADR2G soic?8 (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncs1002a http://onsemi.com 9 package dimensions soic?8 nb case 751?07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncs1002a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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